You will become part of our dynamic engineering team and work with top semiconductor companies worldwide. We also facilitate a personalized mix of office and home work. As part of our innovative research team, you will take full ownership of schematic-to-layout implementation, top-level integration, and layout sign-off-ensuring best-in-class performance, reliability, and manufacturability. * Strong understanding of PCELLS/pycellsPDK Components, floor planning, power grid, IO ring, and ESD integration , . * In-depth knowledge of Layout-Dependent Effects (LDE) , EM/IR analysis, and reliability considerations. * Solid grasp of analog layout fundamentals —including matching, shielding, low-noise design, and electromigrati
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