Excellent communication, problem-solving, and documentation skills. We are seeking an experienced Senior Analog Layout Engineer to design and integrate complex analog and GPIO circuits for advanced process technologies (e.g., TSMC 16nm and below) as well as deep sub-micron nodes. As part of our innovative research team, you will take full ownership of schematic-to-layout implementation, top-level integration, and layout sign-off-ensuring best-in-class performance, reliability, and manufacturability. This role requires close collaboration with analog design, PDK, and EDA tool teams to deliver robust, high-quality layouts that meet stringent foundry and reliability standards. * Execute end-to-end schematic-to-layout des
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